МЕТОДИКА ОТБРАКОВКИ МОП-ТРАНЗИСТОРОВ ПО ПАРАЗИТНОМУ НЕЖЕЛАТЕЛЬНОМУ ОТКРЫВАНИЮ

Abstract

Paper describes one of aspects of the testing of power MOS transistors. There is effect of parasitic undesirable turn-on MOSFET associated with rate of rise drain-source voltage when device switching-off. This parasitic undesirable turn-on may cause catastrophic failure transistor using it in pulse mode with inductive load. In the article identified mechanisms of parasitic undesirable turn-on MOSFET and suggested methodology of testing transistors in the presence of this effect on example of VNB35N07.